Early AMD64 processors lacked the CMPXCHG16B instruction, which is an extension of the CMPXCHG8B instruction present on most post-80486 processors. Similar to CMPXCHG8B, CMPXCHG16B allows for atomic operations on octal words. This is useful for parallel algorithms that use compare and swap on data larger than the size of a pointer, common in lock-free and wait-free algorithms. Without CMPXCHG16B one must use workarounds, such as a critical section or alternative lock-free approaches. This also prevents 64-bit Windows from having a user-mode address space larger than 8 terabytes.
翻译过来大致是早期AMD64处理器不支持该指令
2、关于PrefetchW，应该是AMD处理的一个指令，属于3DNow!指令集
3、关于LAHF/SAHF，是CPU的2个指令
Early AMD64 and Intel 64 CPUs lacked LAHF and SAHF instructions. AMD introduced the instructions with their Athlon 64, Opteron and Turion 64 revision D processors in March 2005；while Intel introduced the instructions with the Pentium 4 G1 stepping in December 2005.
