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UID 894316 帖子 625 PB币 1452 贡献 0 技术 28 活跃 434
本帖最后由 sblook 于 2016-5-11 13:30 编辑
简约控,文件能精简则精简。
我的U是I7 6700T,先上图
6档变频,不知道6700T 这款低压U是否正确。
方法:
1. 通过ssdtPRGen.sh取得生成的ssdt文件,例如我的U得到的代码如下:
请不要复制我的代码,不一定适合你的U
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20140210-00 [Feb 10 2014]
* Copyright (c) 2000 - 2014 Intel Corporation
*
* Original Table Header:
* Signature "SSDT"
* Length 0x0000036A (874)
* Revision 0x01
* Checksum 0x00
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00018200 (98816)
* Compiler ID "INTL"
* Compiler Version 0x20140210 (538182160)
*/
DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00018200)
{
External (\_PR_.CPU0, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU7, DeviceObj)
Scope (\_PR_.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version....: 18.2 / Mac OS X 10.11.4 (15E65)", Debug)
Store ("custom mode..........: 0", Debug)
Store ("host processor.......: Intel(R) Core(TM) i7-6700T CPU @ 2.80GHz", Debug)
Store ("target processor.....: i7-6700T", Debug)
Store ("number of processors.: 1", Debug)
Store ("baseFrequency........: 800", Debug)
Store ("frequency............: 2800", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 8", Debug)
Store ("maximum TDP..........: 35", Debug)
Store ("packageLength........: 29", Debug)
Store ("turboStates..........: 8", Debug)
Store ("maxTurboFrequency....: 3600", Debug)
Store ("machdep.xcpm.mode....: 1", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x08)
Name (APSS, Package (0x1D)
{
/* High Frequency Modes (turbo) */
Package (0x06) { 0x0E10, 0x0088B8, 0x0A, 0x0A, 0x2400, 0x2400 },
Package (0x06) { 0x0DAC, 0x0088B8, 0x0A, 0x0A, 0x2300, 0x2300 },
Package (0x06) { 0x0D48, 0x0088B8, 0x0A, 0x0A, 0x2200, 0x2200 },
Package (0x06) { 0x0CE4, 0x0088B8, 0x0A, 0x0A, 0x2100, 0x2100 },
Package (0x06) { 0x0C80, 0x0088B8, 0x0A, 0x0A, 0x2000, 0x2000 },
Package (0x06) { 0x0C1C, 0x0088B8, 0x0A, 0x0A, 0x1F00, 0x1F00 },
Package (0x06) { 0x0BB8, 0x0088B8, 0x0A, 0x0A, 0x1E00, 0x1E00 },
Package (0x06) { 0x0B54, 0x0088B8, 0x0A, 0x0A, 0x1D00, 0x1D00 },
/* High Frequency Modes (non-turbo) */
Package (0x06) { 0x0AF0, 0x0088B8, 0x0A, 0x0A, 0x1C00, 0x1C00 },
Package (0x06) { 0x0A8C, 0x008257, 0x0A, 0x0A, 0x1B00, 0x1B00 },
Package (0x06) { 0x0A28, 0x007C15, 0x0A, 0x0A, 0x1A00, 0x1A00 },
Package (0x06) { 0x09C4, 0x0075F1, 0x0A, 0x0A, 0x1900, 0x1900 },
Package (0x06) { 0x0960, 0x006FEB, 0x0A, 0x0A, 0x1800, 0x1800 },
Package (0x06) { 0x08FC, 0x006A03, 0x0A, 0x0A, 0x1700, 0x1700 },
Package (0x06) { 0x0898, 0x006438, 0x0A, 0x0A, 0x1600, 0x1600 },
Package (0x06) { 0x0834, 0x005E8B, 0x0A, 0x0A, 0x1500, 0x1500 },
Package (0x06) { 0x07D0, 0x0058FA, 0x0A, 0x0A, 0x1400, 0x1400 },
Package (0x06) { 0x076C, 0x005387, 0x0A, 0x0A, 0x1300, 0x1300 },
Package (0x06) { 0x0708, 0x004E2F, 0x0A, 0x0A, 0x1200, 0x1200 },
Package (0x06) { 0x06A4, 0x0048F4, 0x0A, 0x0A, 0x1100, 0x1100 },
Package (0x06) { 0x0640, 0x0043D5, 0x0A, 0x0A, 0x1000, 0x1000 },
Package (0x06) { 0x05DC, 0x003ED2, 0x0A, 0x0A, 0x0F00, 0x0F00 },
Package (0x06) { 0x0578, 0x0039EA, 0x0A, 0x0A, 0x0E00, 0x0E00 },
Package (0x06) { 0x0514, 0x00351E, 0x0A, 0x0A, 0x0D00, 0x0D00 },
Package (0x06) { 0x04B0, 0x00306C, 0x0A, 0x0A, 0x0C00, 0x0C00 },
Package (0x06) { 0x044C, 0x002BD6, 0x0A, 0x0A, 0x0B00, 0x0B00 },
Package (0x06) { 0x03E8, 0x002759, 0x0A, 0x0A, 0x0A00, 0x0A00 },
Package (0x06) { 0x0384, 0x0022F8, 0x0A, 0x0A, 0x0900, 0x0900 },
/* Low Frequency Mode */
Package (0x06) { 0x0320, 0x001EB0, 0x0A, 0x0A, 0x0800, 0x0800 }
})
Method (ACST, 0, NotSerialized)
{
Store ("Method _PR_.CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 253", Debug)
/* Low Power Modes for CPU0 */
Return (Package (0x06)
{
One,
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x07,
0xF5,
0xC8
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method _PR_.CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR_.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU1.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method _PR_.CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 31", Debug)
/* Low Power Modes for CPU1 */
Return (Package (0x07)
{
One,
0x05,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000040, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000050, // Address
0x03, // Access Size
)
},
0x07,
0xF5,
0xC8
}
})
}
}
Scope (\_PR_.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU2.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU3.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU4.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU5.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU6.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU7.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
} 复制代码 结合我的dsdt文件看
从右侧的树状图,可以看到我的dsdt的cpu定义部分和ssdt结构相当类似,所以基本上就是copy and paste就能完成的。
2. 动手合并
首先把
External (\_PR_.CPU0, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU7, DeviceObj) 复制代码 合并到你的dsdt开头部分的声明中去,很多External都在一起,很容易找。
然后把CPU0-CPU7里面的代码对应替换到dsdt的相应位置。
如:把ssdt中的“Scope (\_PR_.CPU1) {XXXXXXXXXX代码略去}” 把{}里面的内容替换到DSDT文件中的“Scope (_PR.CPU1)”,注意去掉"\_"是合并ssdt的细节,要去掉“\”
3. Clover配置修改
在clover的ACPI配置项下,不要 勾选“generate Pstates”和“generate Cstates”。
4. 重启
5. 检验。把附件中的“MSRDumper.kext”放在桌面
然后调出terminal, 依次输入:
sudo chown -R 0:0 MSRDumper.kext 复制代码 sudo kextload MSRDumper.kext 复制代码 正常的话就能在“控制台”看到U的频率变化了。
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